1. Technical Field
Embodiments of the present invention relate to methods of forming a contact structure and methods of fabricating a semiconductor device using the same. More particularly, embodiments of the present invention relate to a method of forming a contact structure capable of being used in fabricating a highly integrated semiconductor device and a method of fabricating a semiconductor device using a method of forming the contact structure.
2. Discussion of the Related Art
As the integration density of semiconductor devices is increased with high capacity, it has been recently required to ensure a process for minimizing the size of semiconductor chips. As the design rule and chip size of memory cells in a semiconductor device such as DRAM are reduced, it is difficult to overcome the limitation of a photolithography process and secure a sufficient process margin. Particularly, since the size of contact holes and the interval therebetween are more reduced as the integration density of semiconductor devices is increased, it is difficult to perform a photolithography process for forming the contact holes.
A method of forming contact holes has been disclosed in U.S. Pat. No. 6,878,612 issued to by Nagao et al. (hereinafter “Nagao”), entitled “Self-Aligned Contact Process for Semiconductor Device.”
As can be understood from Nagao, first and second gate electrodes are formed on a semiconductor substrate, and a silicon nitride layer having a uniform thickness is formed on the semiconductor substrate having the first and second gate electrodes. A silicon oxide layer having a planarized top surface and filling between the first and second gate electrodes is formed on the semiconductor substrate having the silicon nitride layer. Subsequently, a mask pattern having an opening is formed on the silicon oxide layer. The mask pattern is formed as a photoresist pattern. Thereafter, a contact hole is formed between the first and second gate electrodes by dry etching the silicon oxide layer using the mask pattern as an etching mask.
According to Nagao, a contact hole is formed by dry etching a silicon nitride layer using photolithography and dry etching processes. A method of forming a contact hole using a photoresist pattern as an etching mask is difficult to be applied to the fabrication of highly integrated semiconductor devices. This is because an interval between contact holes formed in different device formation regions becomes smaller as semiconductor devices are highly integrated. Therefore, since a process margin for forming contact holes formed in different device formation regions is reduced, there may be a limit in improving the yield rate of semiconductor devices.